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wm8816 stereo digital volume control advanced information, september 2000, rev 1.1 wolfson microelectronics ltd lutton court, bernard terrace, edinburgh, eh8 9nx, uk tel: +44 (0) 131 667 9386 fax: +44 (0) 131 667 5176 email: sales@wolfson.co.uk http://www.wolfson.co.uk advanced information data sheets contain preliminary data on new products in the pre-production phase of development. supplementary data will be published at a later date. ? 2000 wolfson microelectronics ltd . description the wm8816 is a highly linear stereo volume control for audio systems. the design is based on resistor chains with external op-amps, which provides flexibility for the supply voltage, signal swing, noise floor and cost optimisation. the gain of each channel can be independently programmed from -111.5db to +15.5db through a digital serial control interface. audible clicks on gain c hanges are eliminated by changing gains only when a zero crossing has been detected in the signal. the device also features peak level detection, which can be used for automatic gain control. the wm8816 operates from a single +5v supply and accepts signal input levels up to 18v. the wm8816 is available in a 16-pin soic package. it is guaranteed over a temperature range of -40 to 85 c. features ? gain range from -111.5db to +15.5db ? 0.5db gain step size ? total harmonic distortion 0.001% (100db) typical ? crosstalk -110db typical ? input signals up to 18v ? zero detection for gain changes ? hardware and software mute ? power on/off transient suppression applications ? audio amplifiers ? consumer audio / entertainment systems ? mixing desks ? audio recording equipment block diagram zero crossing detector zero crossing detector peak level detector peak level detector csb (6) muteb (8) data (9) cclk (10) lgnd (5) lin (4) dac (3) lfo (2) lmo rin (13) rgnd (12) (14) rfo (15) rmo (1) avdd (16) agnd (7) dvdd (11) dgnd + - + - left out right out external opamps control wm8816
wm8816 advanced information wolfson microelectronics ltd ai rev 1.1 september 2000 2 pin configuration ordering information device temp. range package XWM8816EDW -40 to +85 o c 16-pin soic (plastic) 10 9 14 13 12 11 5 6 7 1 2 3 4 cclk dgnd rgnd rin rfo agnd rmo dvdd csb lgnd lin lfo avdd lmo 8 15 16 muteb data pin description pin name type description 1 avdd supply supply voltage for analogue circuitry 2 lmo analogue output external op-amp inverting input (left channel) 3 lfo analogue input external op-amp feedback signal (left channel) 4 lin analogue input input signal (left channel) 5 lgnd analogue input input signal ground (left channel) 6 csb digital input chip select (active low) 7 dvdd supply supply voltage for digital circuitry 8 muteb digital input mute (active low) 9 data digital in / out serial interface data input / output (tri-state) 10 cclk digital input serial interface clock 11 dgnd supply digital ground 12 rgnd analogue input input signal ground (right channel) 13 rin analogue input input signal (right channel) 14 rfo analogue input external op-amp feedback signal (right channel) 15 rmo analogue output external op-amp inverting input (right channel) 16 agnd supply analogue ground
advanced information wm8816 wolfson microelectronics ltd ai rev 1.1 september 2000 3 absolute maximum ratings absolute maximum ratings are stress ratings only. permanent damage to the device may be caused by continuously operating at or beyond these limits. device functional operating limits and guaranteed performance specifications are given under electr ical characteristics at the test conditions specified. esd sensitive device. this device is manufactured on a cmos process. it is therefore susceptible to damage from excessive static voltages. to optimise the distortion and noise performance of pins 3, 4, 13 and 14, the on-chip esd protection circuitry has been restricted, and consequently only achieves 300v when characterised to the human body model. proper esd precautions must be taken during handling and storage of this device. as per jedec specification jesd22-a112-a, this product requires specific storage conditions prior to surface mount assembly. it has been classified as having a moisture sensitivity level of 3 and is therefore supplied in vacuum-sealed moisture barrier bag s. condition min max input signal voltage -20v +20v positive supply voltage (avdd to agnd, dvdd to dgnd) -0.5v 6v input voltage (all other pins) -0.5v avdd + 0.5v operating temperature -40 c85 c storage temperature -55 c 125 c recommended operating conditions parameter symbol test conditions min typ max unit input signal voltage -18 +18 v positive supply voltage avdd, dvdd 4.5 5 5.5 v negative supply voltage agnd, dgnd 0 v input signal grounds lgnd, rgnd 0 v operating temperature -20 60 60 c electrical characteristics test conditions avdd = 5.0v, agnd = 0v, t a = 25c, unless otherwise stated. parameter symbol test conditions min typ max unit analogue inputs / outputs input resistance r in for any gain 7 10 k ? input capacitance c in for any gain 2 pf input offset voltage v offset external op275 opamp, gain = 1 1mv supply current i dd from avdd / agnd 2.5 5 ma power supply rejection ratio (note 1) psrr from avdd 80 db gain control gain range g -111.5 +15.5 db gain step size d 0.5 db gain error (note 1) de lowest gains guaranteed by design, not tested in production. 0.5 db gain match error (note 1) me between channels 0.2 db mute attenuation matt 113 db
wm8816 advanced information wolfson microelectronics ltd ai rev 1.1 september 2000 4 test conditions avdd = 5.0v, agnd = 0v, t a = 25 c, unless otherwise stated. parameter symbol test conditions min typ max unit audio performance gain = 0db 13 n gain = -60db 4 v rms noise (note 1) v in = 0v, v out with op275, a-weighed gain = mute 2.5 total harmonic distortion plus noise thd+n v in = 1vrms, gain=0db, v out with op275, dc to 20 khz 0.001 (100) % (db) dynamic range (note 1) dr 120 130 db crosstalk (note 1) cr between channels, gain=0db, f in =1khz -100 -110 db digital inputs / outputs input low voltage v il all digital inputs 0.3 dvdd v input high voltage v ih all digital inputs 0.7 dvdd v output low voltage v ol i load = 2ma 0.4 v output high voltage v oh i load = 2ma dvdd -0.4 v control interface timing clock frequency f cclk 1mhz period of cclk high t whc v ih to v ih 500 ns period of cclk low t wlc v il to v il 500 ns rise time of cclk t rc v il to v ih 100 ns fall time of cclk t fc v ih to v il 100 ns hold time, cclk high to csb low t hchs 20 ns setup time, csb low to cclk high t sslch 100 ns setup time, valid data to cclk high t sdch 100 ns hold time, cclk high to invalid data t hchd 100 ns setup time, cclk low to valid data t dcld load = 100pf 200 ns hold time, csb high or 16 th cclk low to invalid data t dsz load = 3.3k ? 20 200 ns hold time, 16 th cclk high to csb high t hlchs 200 ns setup time, csb high to cclk high t sshch 200 ns note: 1. guaranteed by design .
advanced information wm8816 wolfson microelectronics ltd ai rev 1.1 september 2000 5 control interface timing diagram cclk a7 data (in) a6 a5 a4 a3 a2 a1 a0 csb data (out) d7 d6 d5 d4 d3 d2 d1 d0 d7 d6 d5 d4 d3 d2 d1 d0 t sslch t hcsh t wlc t whc t rc t fc t sdch t hchd t dcld t dsz t hlchs t dsshch address byte data byte figure 1 control interface timing diagram
wm8816 advanced information wolfson microelectronics ltd ai rev 1.1 september 2000 6 device description the wm8816 is a stereo digital volume control designed for audio systems. the levels of the left and right analogue channels can be programmed independently through the serial interface. the resistor values in the internal resistor chains are decoded to 0.5 db resolution with multiplexers, giving a gain range of -111.5 to +15.5 db. the code for -112 db activates mute for maximum attenuation. the wm8816 has two constant impedance signal inputs. the left channel input is between lin and lgnd, and the right channel between rin and rgnd. the output pins lfo, lmo (left) and rfo, rmo (right) are designed to interface directly to two external op-amps, which produce the volume controlled output signals. this provides flexibility for the supply voltage and signal swing; while the wm8816 runs at 5v, the output signal swing depends solely on the op-amp supply. interfaces control information is written into or read back from the internal register via the serial control port. this port consists of a bi-directional data pin (data), an active low chip select pin (csb) and the control clock (cclk). control data is shifted into the serial input register on the rising edges of cclk pulses, while csb is low. all control instructions require two bytes of data. the first byte contains a 4- bit register address and a read/write bit, and the second byte is the control word. csb must return to high at the end of each word. when reading from the control registers, data is shifted out on the falling edges of cclk. when csb is high, the data pin is in a high impedance state. in a multi-channel system, the same data and cclk lines can thus be connected to several wm8816 volume controllers, and each device can be independently addressed by pulling its csb pin low. operating modes when power is first applied, a power-on reset initialises the control registers mutes the wm8816. to activate the device, the muteb pin must be high and a non-zero value must be written to the gain register. after that the device can be muted again either by pulling the muteb pin low or by writing zero (00hex) to the gain register. for device testing, the muteb pin becomes an output when bit 1 of the test register is high. internal signals can then be directed to muteb and monitored. changing the gain of the channel the wm8816 has two gain registers for the left and right channels respectively. there is also an alias register address to update both gain registers simultaneously. when a new gain value is written into a gain register the wm8816 will wait until the next falling edge zero crossing in the input signal before changing the gain. this ensures that no audible click is produced at the output. if there are no zero crossings in the signal after 18ms, the gain is changed regardless. if both gain registers are changed simultaneously, the gain is changed first on the right and then the left channel. peak level detection the wm8816 has an on-chip 8-bit digital-to-analogue converter (dac) used for monitoring the peak level of the output signal. the dac input value is programmed via the serial interface. the reference value v ref is calculated from v ref = k/256 18v, where k is the dac input code. when a positive peak signal level exceeds this value, the peak detector sets bit 1 (for the left channel) or bit 0 (right channel) of the status register. these bits remain set until the status register is read.
advanced information wm8816 wolfson microelectronics ltd ai rev 1.1 september 2000 7 register map address byte bits data byte register 7 6 5 4 3 2 1 0 msb?lsb function peak detector status cr4 x 1 0 1 1 r/w x x output code 00000000 00000001 00000010 00000011 no overload right overload left overload both overload peak detector reference cr3 x 1 1 0 0 r/w x x input code 11111111 11111110 11111101 : 00000010 00000001 00000000 dac output 255/256 18v 254/256 18v 253/256 18v : 2/256 18v 1/256 18v agnd left channel gain cr2 x 1 1 0 1 r/w x x input code 11111111 11111110 11111101 : 11100000 00000010 00000001 00000000 gain db +15.5 +15.0 +14.5 : 0.0 -111.0 -111.5 mute right channel gain cr1 x 1 1 1 0 r/w x x input code 11111111 11111110 11111101 : 11100000 00000010 00000001 00000000 gain db +15.5 +15.0 +14.5 : 0.0 -111.0 -111.5 mute test, cr5 x1111r/wxx reserved both channel gains x 1 0 0 1 w x x write to both gain registers table 1 register map description notes: 1. address bit 2 is the read / write bit (1 for read, 0 for write). 2. x are don ? t cares, set to 1 for minimum power consumption. 3. all registers are set to their default value (all zeros) during power-on reset, except cr3 which is set to 255.
wm8816 advanced information wolfson microelectronics ltd ai rev 1.1 september 2000 8 test register when bit 1 in register cr5 is set, muteb becomes an output pin. bits 2, 3 and 4 select different internal signals which can then be seen via the muteb pin. data byte bits condition 76543210 function normal (muteb configured as input) 0 0 0 0 0 0 0 1 latch the new gain value to resistor network 0 0 0 0 0 0 1 0 left delay generator 0 0 0 0 0 1 1 0 left peak detector 00001010 left zero crossing 0 0 0 0 1 1 1 0 left enable for zero crossing and delay generator 0 0 0 1 0 0 1 0 right delay generator 0 0 0 1 0 1 1 0 right peak detector 00011010 right zero crossing test mode (muteb configured as output) 0 0 0 1 1 1 1 0 right enable for zero crossing and delay generator table 2 test register description performance graphs figure 2 thd + noise versus input level at gains of +6db, 0db, -6db, -12db and mute figure 3 fft of output signal with 1khz, 1v rms sine wave input -120 -70 -110 -100 -90 -80 (db) thd+n -60 +10 -50 -40 -30 -20 -10 +0 input signal level (dbv) 5k 30k 10k 15k 20k 25k frequency (hz) -140 +0 -120 -100 -80 -60 -40 -20 d b v
advanced information wm8816 wolfson microelectronics ltd ai rev 1.1 september 2000 9 figure 4 fft of output signal with 10khz, 1v rms sine wave input power supply decoupling for best audio performance, all digital activities should be avoided during analogue signal processing. special attention should be paid to power and ground decoupling. if possible separate analogue and digital power supplies should be used. a clean analogue power supply should be used for avdd. dvdd should be the same as avdd to avoid latch-up phenomena. decoupling capacitors should be located as close to the wm8816 as possible. 5k 30k 10k 15k 20k 25k frequency (hz) -140 +0 -120 -100 -80 -60 -40 -20 d b v
wm8816 advanced information wolfson microelectronics ltd ai rev 1.1 september 2000 10 recommended external components c1 rin +5v dc + c2 rmo right channel input 1 dvdd dgnd avdd agnd 16 7 11 wm8816 c3 micro controller csb data cclk muteb 6 9 10 8 + - rfo rgnd 15 14 13 12 lin lmo left channel input + - lfo lgnd 2 3 4 5 +18v +18v -18v -18v note: connect signal ground and non-inverting opamp input together on the pcb figure 5 typical application recommended external components values component reference suggested value description c1 220nf analogue supply decoupling c2 220nf digital supply decoupling c3 10 f general supply decoupling table 3 recommended external components values
advanced information wm8816 wolfson microelectronics ltd ai rev 1.1 september 2000 11 rin rmo wm8816 dac balanced output + - rfo rgnd 15 14 13 12 lin lmo + - lfo lgnd 2 3 4 5 +18v +18v -18v -18v + - +18v -18v 2k 2k 2k 2k figure 6 configuration for double balanced output (one channel)
wm8816 advanced information wolfson microelectronics ltd ai rev 1.1 september 2000 12 package dimensions symbols dimensions (mm) dimensions (inches) minmaxminmax a 2.35 2.65 0.0926 0.1043 a 1 0.10 0.30 0.0040 0.0118 b 0.33 0.51 0.0130 0.0200 c 0.23 0.32 0.0091 0.0125 d 10.10 10.50 0.3465 0.3622 e 1.27 bsc 0.0500 bsc e 7.40 7.60 0.2914 0.2992 h 0.25 0.75 0.0100 0.0290 h 10.00 10.65 0.3940 0.4190 l 0.40 1.27 0.0160 0.0500 0 o 8 o 0 o 8 o ref: jedec.95, ms-013 notes: a. all linear dimensions are in millimeters (inches). b. this drawing is subject to change without notice. c. body dimensions do not include mold flash or protrusion, not to exceed 0.25mm (0.010in). d. meets jedec.95 ms-013, variation = aa. refer to this specification for further details. dm019.a dw: 16 pin soicw 7.5mm (0.3") wide body, 1.27mm lead pitch l a 16 d e b 1 8 9 h x 45 o c e h seating plane a1 -c- 0.10 (0.004)

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